In order to deal with requirements for a recent high-density trend of a semiconductor chip (LSI) and readily deal with requirements for partial specification changes, a three-dimensional semiconductor chip module in which plural semiconductor chips have been stacked, integrated, and electrically interconnected has been proposed.
In conventional three-dimensional semiconductor chip modules, electrical connection among semiconductor chips has been established with use of a through hole (refer to Patent Document 1) or with use of an end face (side face) of a semiconductor chip (refer to Patent Document 2).
Also, in mounting a three-dimensional semiconductor chip module to an attachment board such as a printed wiring board, a method of connecting a terminal provided on a face of each layer to a terminal provided on a face of the attachment board by a wire is proposed.    Patent Document 1: Japanese Patent Application Public Disclosure No. 2001-135785    Patent Document 2: Japanese Patent Application Public Disclosure No. 2007-19484    Non-Patent Document 1: Craig Keast et al, “Three-Dimensional Integration Technology for Advanced Focal Planes”, 3D-SIC 2007, pp. 3-1 to 13-16, March, 2007